Job Openings - U.S.A.

To apply for any of our open positions, please send an e-mail to:
careers@open-silicon.com

· Senior Product/Test Engineer
· IP Senior Manager
· System Solutions Manager
· Senior Analog / Mixed Signal Applications Engineer
· Senior Analog / Mixed Signal Design Engineer
· Senior Applications / Mixed Signal Engineer
· Senior SerDes and Signal Integrity Applications Engineer
· Senior SerDes and Signal Integrity Design Engineer
· Senior Assembly and Packaging Engineer

Job Title: Senior Product/Test Engineer, Sunnyvale, CA
Min Educational Qualifications:BSEE (MSEE preferred). Or equivalent experience
Relevant Experience: 5+ years ATE experience
Job Description:Will have responsibility for ATE test programs. Will create, modify and maintain programs for prototype, productions and characterization of Open-Silicon products. Will ensure a predictable and smooth test flow from design through probe and final test. Will work closely with other functional groups (design, assembly and applications) to resolve issues and drive product prototype evaluation and production release. Monitor and improve device yield and work on cost reduction of high volume devices. Work closely with customers and vendors on device qualification. Will work on device failure analysis.
Requirements:
· Familiarity with ATE programming and equipment (Agilent/Credence preferred)
· Good software discipline for creation of ATE programs
· C and Unix experience
· Effective communication and analytical skills
· Understanding of basic CMOS circuits
· Design For Test (DFT) experience is a plus
· Good understanding of DFT methodologies

Job Title: IP Senior Manager, Sunnyvale, CA / Bangalore, India
At Open-Silicon, you will become part of an exciting, dynamic and fun IP group that will challenge your circuit design, personal communications, physical integration and sales/applications skills. This position is ideal to start in Sumnyvale, CA and relocate in two or three months to our Bangalore, India location.
Min Educational Qualifications: Bachelor’s degree in Electronics Engineering, Computer Science, or closely related field, or the equivalent. MSEE is preferred.
Relevant Experience: 8-12 years of experience in Applications Engineering or IC Design development and implementation of various digital blocks that includes standard cells, memories, I/O’s and digital cores.
Job Description:
· Build and manage a team of IP engineers.
· Qualification and integration of various types of standard cells, memories, I/O’s and digital cores.
· Work very closely with IP Vendors in defining, qualifying and procuring new custom and existing digital blocks.
· Provide product and technical support to both sales and Physical Design organizations.
· Use of front and back end tools for qualification of the IP.Requirements: Must be able to write scripts for automation.Experience with Front and Back-end (Including HSPICE) tools from Magma and Synopsys.Experience with ESD/latch-up and process technologies is highly desirable.Excellent writing and communication skills are required.SerDes experience is a plus.

Job Title: System Solutions Manager, Sunnyvale, CA
Min Educational Qualifications: BSEE or MSEE with 8-10 years of experience
Job Description:The System Solutions Manager will work with Open-Silicon customers to analyze their chip designs and provide consultation regarding architectural implementation and IP selection tradeoffs including, but not limited to, package/test and process technology. Will also perform some design verification using Verilog.Requirements:
· An understanding of all parameters of ASIC design and production, including chip architecture, physical design and post tape-out operations.
· Should have experience in customer-facing roles, preferably sales/applications.
· Must have participated in at least 2 ASIC designs from architectural concept to tape-out
· Must posses outstanding written and verbal communication skills and a dedication to customer satisfaction
· Experience with ASIC development for the communications and consumer markets is preferred.
· Experience using Verilog for design verification is required.


Job Title: Senior Analog / Mixed Signal Applications Engineer, Sunnyvale, CA
Min Educational Qualifications: Bachelor’s degree in Electronics Engineering, Computer Science, or closely related field, or the equivalent. MSEE is preferred.
Job Description:As part of this job, your responsibilities will be:
· Mixed-signal qualification and integration of various types of DAC/ADC, PLL, AFE and other complex hard macros.
· Work very closely with IP Vendors in defining, qualifying and procuring new custom blocks.
· Provide product and technical support to both the marketing/sales and Physical Design organizations.
· Use of front and back end tools for qualification of the IP.Requirements:
· 8-10 years of experience in Applications Engineering or IC Design development and implementation of various mixed-signal blocks that includes DAC/ADC, AFE, voltage references and band gap designs.
· Experience with Front and Back-end (Including HSPICE) tools from Magma and Synopsys.
· Be able to write scripts for automation.
· Experience with ESD/latch-up and process technologies is highly desirable.
· Experience with video display, graphics and wireless LAN is highly recommended.
· Excellent writing and communication skills are required.
Job Title: Senior Analog / Mixed Signal Design Engineer, Sunnyvale, CA
Min Educational Qualifications: Bachelor’s degree in Electronics Engineering, Computer Science, or closely related field, or the equivalent. MSEE is preferred.
Job Description:As part of this job, your responsibilities will be:
· Mixed-signal qualification and integration of various types of DAC/ADC, PLL, AFE and other complex hard macros.
· Work very closely with IP Vendors in defining, qualifying and procuring new custom blocks.
· Provide product and technical support to both the marketing/sales and Physical Design organizations.
· Use of front and back end tools for qualification of the IP.Requirements:
· 8-10 years of experience in Applications Engineering or IC Design development and implementation of various mixed-signal blocks that includes DAC/ADC, AFE, voltage references and band gap designs.
· Experience with Front and Back-end (Including HSPICE) tools from Magma and Synopsys.
· Be able to write scripts for automation.
· Experience with ESD/latch-up and process technologies is highly desirable.
· Experience with video display, graphics and wireless LAN is highly recommended.
· Excellent writing and communication skills are required.
Job Title: Senior Applications / Mixed Signal Engineer, Sunnyvale, CA
Min Educational Qualifications:Bachelor’s degree in Electronics Engineering, Computer Science, or closely related field, or the equivalent. MSEE is preferred.Job Description:As part of this job, your responsibilities will be:
· Mixed-signal qualification and integration of High-Speed I/O, DAC/ADC, SerDes, PLL, AFE and other complex hard macros.
· Work very closely with IP Vendors in defining, qualifying and procuring new custom blocks.
· Provide product and technical support to both the marketing/sales and Physical Design organizations.
· Use of front and back end tools for qualification of the IP.Job Requirements:
· 5-8 years of experience in Applications Engineering or IC Design development and implementation of various mixed-signal blocks that includes high-speed I/O, AFE, and libraries.
· Experience with Front and Back-end (Including HSPICE) tools from Magma and Synopsys.
· Be able to write scripts for automation.
· Some experience in Circuit design of high speed I/O, transmission theory, ESD/latch-up is required.
· Excellent writing and communication skills are required.
· Job Title: Senior SerDes and Signal Integrity Applications Engineer, Sunnyvale, CA
Min Educational Qualifications: Bachelor’s degree in Electronics Engineering, Computer Science, or closely related field, or the equivalent. MSEE is preferred.
Relevant Experience: 6 -10 years of experience in Applications Engineering or IC Design development and implementation of various mixed-signal blocks that includes high-speed I/O and 1 to 3.25 Gbts SerDes.
Job Description: At Open-Silicon, you will become part of an exciting, dynamic and fun IP/Analog group that will challenge your circuit design, personal communications, physical integration and sales skills.As part of this job, your responsibilities will be:
· Mixed-signal qualification and integration of High-Speed I/O and SerDes (up to 6 Gbts).
· Work very closely with IP Vendors in defining, qualifying and procuring new custom blocks.
· Provide product and technical support to both the marketing/sales and Physical Design organizations.
· Use of front and back end tools for qualification of the IP.
· Define architecture trade-offs for using SerDes in different applications including, but not limited to, SATAII, PCIe, Ethernet, Back plane, Rapid I/O, SONET and XAUI.
· Develop methodologies for on-chip/off-chip signal integrity analysis for all high speed interfaces.
· Assist with the training of other engineers to perform signal integrity analysis.Requirements:
· Experience with Front and Back-end (Including HSPICE) tools from Magma and Synopsys.
· Be able to write scripts for automation.
· Experience in Circuit design of high speed I/O, pre-emphasis, equalization, transmission theory and ESD/latch-up is required.
· Experience in SSO analysis, eye-pattern generation, signal integrity, off-chip and ISI.
· Knowledge of SerDes encoding/decoding protocols is highly desirable.
· Excellent writing and communication skills are required.

Job Title: Senior SerDes and Signal Integrity Design Engineer, Sunnyvale, CA
Min Educational Qualifications: Bachelor’s degree in Electronics Engineering, Computer Science, or closely related field, or the equivalent. MSEE is preferred.
Relevant Experience: 6 -10 years of experience in Applications Engineering or IC Design development and implementation of various mixed-signal blocks that includes high-speed I/O and 1 to 3.25 Gbts SerDes.
Job Description: At Open-Silicon, you will become part of an exciting, dynamic and fun IP/Analog group that will challenge your circuit design, personal communications, physical integration and sales skills.As part of this job, your responsibilities will be:
· Mixed-signal qualification and integration of High-Speed I/O and SerDes (up to 6 Gbts).
· Work very closely with IP Vendors in defining, qualifying and procuring new custom blocks.
· Provide product and technical support to both the marketing/sales and Physical Design organizations.
· Use of front and back end tools for qualification of the IP.
· Define architecture trade-offs for using SerDes in different applications including, but not limited to, SATAII, PCIe, Ethernet, Back plane, Rapid I/O, SONET and XAUI.
· Develop methodologies for on-chip/off-chip signal integrity analysis for all high speed interfaces.
· Assist with the training of other engineers to perform signal integrity analysis.Requirements:
· Experience with Front and Back-end (Including HSPICE) tools from Magma and Synopsys.
· Be able to write scripts for automation.
· Experience in Circuit design of high speed I/O, pre-emphasis, equalization, transmission theory and ESD/latch-up is required.
· Experience in SSO analysis, eye-pattern generation, signal integrity, off-chip and ISI.
· Knowledge of SerDes encoding/decoding protocols is highly desirable.
· Excellent writing and communication skills are required.

Job Title: Senior Assembly and Packaging Engineer, Sunnyvale, CA
Min Educational Qualifications:BS/MSEE, ME or Material Science with 7+ years of relevant experience in assembly and packaging.
Job Description:We are looking for an innovative engineer who is ready to forge ahead with a "do it the right way" attitude, instead of status quo. You will be involved in the initial decision-making process for choosing the correct package types. You will be able to provide your input as the die layout is being defined, instead of reacting to whatever is thrown over the design wall. You will manage the package design and development with our subcontractors, build prototypes, and coordinate the qualification. You will be responsible for planning the ramp-up to production and all sustaining activities for high volume production.
Responsibilities:
· Interface with customers to aid in defining the optimum packages for their specific applications.
· Work very closely with IP and Device Layout teams to provide package guidelines and restrictions during die design.
· Develop packages for a wide spectrum of package types: Flip-chip, BGA, CSP, MCM and leadframe product.
· Coordinate assembly activities from prototype builds through production to end-of-life, with emphasis on quality, yields, cycle time & cost reduction.
· Interface with assembly subcontractors regarding process control & improvements, failure analysis, qualification and documentation.
· Implement systems & infrastructure to guarantee first pass success for design. Requirements:
· Knowledge of high-speed design requirements.
· Broad experience with both design & assembly manufacturing requirements
· Excellent written and verbal communication skills.
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Corporate Offices

For immediate sales assistance, or to contact an Open-Silicon Sales Director or Representative, please see our list of Sales Representatives.

Corporate Headquarters:

California, USA

455 DeGuigne Drive

Sunnyvale, CA 94085

Main - 408-523-1200

Fax - 408-328-8379

Bangalore India

No. 11/1 & 12/1 Maruthi Infotech Centre, Gnd flr

Indiranagar-Koramangala Intermediate Ring Rd.

Bangalore - 560-071, India

Tel: +91-80-5112-3844

For further information please email info@open-silicon.com

Boston MA

North Andover Business Park

203 Turnpike Street Suite 407

North Andover, MA 01845

Main - 978-725-8800

Fax - 978-725-6882

For further information please email info@open-silicon.com